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The aim of the ESSDERC conference is to provide an annual European forum for the presentation and discussion of recent advances in solid-state devices and technologies. ESSDERC and its sister conference ESSCIRC, which deals with solid-state circuits, are governed by a single Steering Committee. The increasing level of integration for system-on-chip design made available by advances in silicon technology is stimulating more than ever before the need for deeper interaction among technologists, device experts, and circuit and system designers. While keeping separate Technical Program Committees, ESSDERC and ESSCIRC will share Plenary Keynote Presentations and Joint Sessions bridging both communities. Attendees registered for either conference are encouraged to attend any of the scheduled parallel sessions. The main themes for original contributions to be submitted to ESSDERC 2009 include, but are not limited to the following:

Ultimate CMOS scaling, high performance, low power and low voltage devices, novel MOS device architectures (double and multiple gate, vertical, ballistic), high-mobility channel engineered devices, SOI, SGOI, and SiON devices; SiGe, Ge, and strained devices;

Processing and Integration
Gate dielectrics, high k, gate stack, junction technology, cleaning and surface preparation, 3D integration, interconnects, low k dielectrics, advances in integration for ULSI; SOI, SGOI; advanced/novel memory process integration; logic and mixed-mode IC manufacturing; RF  integration (passives, active devices); photonics integration

RF CMOS, analog and mixed signal devices, passives, antennas, filters, RF MEMS, Bipolar, BiCMOS, compound semiconductors (GaAs, InP, GaN, SiC, alloys) and optoelectronic devices, smart power devices, high-voltage, high power devices, high temperature operation, SiC devices, CMOS compatible power devices, IC cooling

Numerical and analytical modeling of solid-state electronic and optoelectronic devices, quantum mechanical and non-stationary transport phenomena, ballistic transport, compact circuit modeling for devices and interconnects, modeling and simulation of front-end and back-end fabrication processes, electro-thermal modeling and simulation

Characterization techniques, parameter extraction, advanced test structures and methodologies, reliability issues for new materials and devices (reliability of high-k and low-k materials), reliability of advanced interconnects, ESD, EMI, defect monitoring and control, metrology

Embedded and stand-alone memories, DRAM, FeRAM, MRAM, PCRAM, CBRAM, Flash, SONOS, nanocrystal memories, single and few electron memories, 3D IC stacks, organic memories

Design, fabrication, modeling, reliability and packaging of all physical sensors and MEMS categories, bio-sensors for chemical, molecular and biological applications, BioMEMS, devices and technologies for lab-on-chip, integration of detectors, sensors, and actuators, CCDs and CMOS imagers, optical on chip communication, display technologies, TFTs, organic electronics, flexible substrate electronics, SoC and SiP packaging, microsystem packaging.

 Emerging non-CMOS devices and technologies 

Nanotubes, nanowires and nanoparticles for electronic, optoelectronic and sensor applications, materials and device related issues, single-electron, molecular and quantum devices, nanophotonics, spintronics, self-assembling methods, photonic devices

These sessions will focus on topics at the boundary between design and technology depending on the submitted abstracts. Contributions are solicited (but not limited) in the areas of circuit design and simulation techniques for process variability in nm-scale technologies as well as of microwave components over silicon substrates.

ESSDERC and ESSCIRC will share Plenary Sessions where distinguished invited speakers will discuss issues of interest for the attendees of both conferences. In addition, there will be renowned ESSDERC invited speakers who will address issues of specific interest to the devices and technologies community.